Book(s)

D. D. Gajski, S. Abdi, A. Gerstlauer, G. Schirner, "Embedded System Design: Modeling, Synthesis and Verification", Springer, Boston, September 2009, (ISBN 978-1-4419-0503-1). review link

G. Schirner, M. Götz, A. Rettberg. M.C. Zanella, F.J. Rammig (Eds.), "Embedded Systems: Design, Analysis and Verification", Springer, June 2013 (ISBN 978-3-642-38853-8) link eBook

Book Chapter(s)

G. Schirner, R. Dömer and A. Gerstlauer, "High-Level Development, Modeling and Automatic Generation of Hardware-dependent Software", Chapter 8 in "Hardware-dependent Software: Principles and Practice" (ed. W. Ecker, W. Müller, R. Dömer), Springer, Boston, May 2009. (ISBN 1402094353)

Journal Articles

G. Schirner, D. Erdogmus, K. Chowdhury, T. Padir, "The Future of Human-in-the-Loop Cyber-Physical Systems", IEEE Computer, vol. 46, no. 1, pp. 36-45, Jan. 2013 pdf

S. Abdi , Y. Hwang , L. Yu , G. Schirner , D. Gajski, "Automatic TLM Generation for Early Validation of Multi-core Systems", IEEE Design and Test of Computers, vol. 28, no. 3, pp. 10-19, May 2011 pdf

G. Schirner, A. Gerstlauer and R. Dömer, "Fast and Accurate Processor Models for efficient MPSoC Design", ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 15, no. 2, pp. 10:1-10:26, Feb. 2010. pdf

G. Schirner and R. Dömer: "Quantitative Analysis of the Speed/Accuracy Trade-off in Transaction Level Modeling", ACM Transactions on Embedded Computing Systems (TECS), vol. 8, no. 1, pp. 4:1-4:29, Dec. 2008. pdf

G. Schirner and R. Dömer: "Result Oriented Modeling - A Novel Technique for Fast and Accurate TLM", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 26, no. 9, pp. 1688-1699, Sept. 2007. pdf

Peer Reviewed Conference Publications

H. Tabkhi, R. Bushey, G. Schirner, "Algorithm and Architecture Co-Design of Mixture of Gaussian (MoG) Background Subtraction for Embedded Vision Processor", Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC), Nov. 2013, pdf

R. Bushey, H. Tabkhi, G. Schirner, "Flexible Function-Level Acceleration of Embedded Vision Applications using the Pipelined Vision", Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC), Nov. 2013 (invited), pdf

J. Zhang, G. Schirner, "Joint Algorithm Developing and System-Level Design: Case Study on Video Encoding", Proceedings of the International Embedded Systems Symposium (IESS), June 2013 pdf

R. Bushey, H. Tabkhi, G. Schirner, "A Novel Quantitative ESL Based SOC Architecture Exploration Methodology", Analog Devices General Technical Conference (ADI GTC), April 2013

Y. Ukidave, A. Ziabari, P. Mistry, G. Schirner, D. Kaeli, "Quantifying the Energy Efficiency of FFT on Heterogeneous Platforms", IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Apr. 2013

H. Tabkhi G. Schirner, "AFReP: Application-guided Function-level Registerfile Power-gating for Embedded Processors", International Conference on Computer-Aided Design (ICCAD), San Jose, CA, Nov 2012 pdf

H. Tabkhi G. Schirner, "ARRA: Application-guided Reliability-enhanced Registerfile Architecture for Embedded Processors", IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Santa Cruz, CA, Oct 2012 pdf

R. Birken, G. Schirner, M. Wang, "VOTERS: Design of a Mobile Multi-Modal Multi-Sensor System", International Workshop on Knowledge Discovery from Sensor Data, Beijing, China, Aug 2012 (invited paper) pdf

M. Ravel, G. Schirner, D. Kaeli, "An Open Mobile Platform Approach to Integrating Active Learning Across the EE/CE/ICT Engineering Curriculum", European Workshop on Microelectronics Education (EWME), May 2012, Grenoble, France (workshop) pdf

H. Tabkhi G. Schirner, "Application-Specific Power-Efficient Approach for Reducing Register File Vulnerability", Design Automation and Test In Europe (DATE), Dresden, Germany, March 2012 pdf

G. Schirner, "Modeling, Synthesis, and Validation of Heterogeneous Biomedical Embedded Systems", High-Level Design, Verification and Test (HLDVT), Napa, CA, Nov 2011 (invited paper) pdf

G. Schirner, "Exploring SW Performance Using Preemptive RTOS Models", Proceedings of Rapid System Prototyping Symposium, June 2010. Fairfax, VA, (invited paper) pdf

Y. Hwang, G. Schirner, S. Abdi, D. D. Gajski, "Accurate Timed RTOS Model for Transaction Level Modeling", Proceedings of Design Automation and Test in Europe (DATE), Dresden, Germany, March 2010 pdf

G. Schirner, A. Gerstlauer, R. Dömer, "System-Level Development of Embedded Software", Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), Taipei, Taiwan, Jan. 2010. (invited paper) pdf

A. Gerstlauer, G. Schirner, "Platform Modeling for Exploration and Synthesis, Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), Taipei, Taiwan, Jan. 2010. (invited paper) pdf

Y. Hwang, G. Schirner, S. Abdi, "Automatic Generation of Cycle-Approximate TLMs with Timed RTOS Model Support", Proceedings of the International Embedded Systems Symposium (IESS), Sept. 2009 pdf

S. Abdi, G. Schirner, I. Viskic, H. Cho, Y. Hwang, L. Yu, D. Gajski, "Hardware-dependent Software Synthesis for Many-Core Embedded Systems", Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, January 2009 (invited paper) pdf

G. Schirner and R. Dömer: "Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling", In Proceedings of Design Automation and Test in Europe (DATE), Munich, Germany, March 2008. pdf

G. Schirner, A. Gerstlauer, R. Dömer: "Automatic Generation of Hardware dependent Software for MPSoCs from Abstract System Specifications", Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), Seoul, Korea, January 2008. pdf

G. Schirner and R. Dömer: "Analysis and Optimization of Fast and Accurate SoC Platform Models",  In SIGDA PhD Forum at the Design Automation Conference, San Diego, California, June 5th, 2007 pdf

G. Schirner, G. Sachdeva, A. Gerstlauer, R. Dömer: "Embedded Software Development in a System-level Design Flow", Proceedings of the International Embedded Systems Symposium, "Embedded System Design: Topics, Techniques and Trends" (ed. A. Rettberg, M. Zanella, R. Dömer, A. Gerstlauer, F. Rammig), Springer, Irvine, California, May 2007. pdf

G. Schirner, A. Gerstlauer and R. Dömer: "Abstract Multifaceted Modeling of Embedded Processors for System-Level Design", Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, January 2007. pdf, presentation

G. Schirner and R. Dömer: "Fast and Accurate Transaction Level Models using Result Oriented Modeling", In Proceedings of  the International Conference on Computer Aided Design (ICCAD), San Jose, California, November 2006. pdf, presentation

G. Schirner and R. Dömer: "Accurate yet Fast Modeling of Real-Time Communication", Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES ISSS), Seoul, Korea, October 2006. pdf

G. Schirner and R. Dömer: "Quantitative Analysis of Transaction Level Models for the AMBA Bus", In Proceedings of Design Automation and Test in Europe (DATE), Munich, Germany, March 2006. pdf

G. Schirner and R. Dömer: "Abstract Communication Modeling: A Case Study Using the CAN Automotive Bus", In Proceedings of International Embedded Systems Symposium, "From Specification to Embedded Systems Application" (ed. A. Rettberg, Z. Mauro, F. Rammig), Springer, Manaus, Brazil, Aug. 2005. (Best Paper Award) pdf

G. Schirner, T. Harmon, and R. Klefstad: "Late Demarshalling: A Technique for Efficient Multi-language Middleware for Embedded Systems" (2004). Lecture Notes in Computer Science. 3291 / 2004, pp. 1155-1172. 10.1007/b102176. pdf

Technical Reports

A. Gerstlauer, G. Schirner, D. Shin, J. Peng, R. Dömer, D. Gajski: "System-on-Chip Component Models", Center for Embedded Computer Systems, Technical Report 06-10, May 2006

G. Schirner, G. Sachdeva, A. Gerstlauer, R. Dömer: "Modeling, Simulation and Synthesis in an Embedded Software Design Flow for an ARM Processor", Center for Embedded Computer Systems, Technical Report 06-06, May 2006. pdf

G. Schirner and R. Dömer: "Using Result Oriented Modeling for Fast yet Accurate TLMs", Center for Embedded Computer Systems, TR 05-05, May 05, 2005. pdf

G. Schirner and R. Dömer: "System Level Modeling of an AMBA Bus", Center for Embedded Computer Systems, TR 05-03, April 2005. pdf

P. Chandraiah, H. Schirner, N. Srinivas, and R. Dömer: "System-On Chip Modeling and Design: A Case Study on MP3 Decoder", Center for Embedded Computer Systems, TR 04-17, June 21, 2004. pdf

Theses

G. Schirner, "Analysis and Optimization of Transaction Level Models for Multi-Processor System-on-Chip Design", June 2008, Ph.D. Dissertation, Electrical Engineering and Computer Science, University of California Irvine, pdf

G. Schirner, "System Level Modeling of an AMBA Bus" March 2005. Master Thesis, University of California Irvine, pdf